With the sizes of the integrated circuits becoming increasingly smaller, the respective formation processes also become increasingly more difficult, and problems may occur where conventionally no problems will occur. For example, in the formation of Fin Field-Effect Transistors (FinFETs), the metal gates and the adjacent source and drain regions may be electrically shorted to each other. The contact plugs of metal gates may also be shorted to the adjacent contact plugs of source and drain regions.
In addition, the formation of FinFETs may involve the formation of dummy polysilicon gates, removing the dummy polysilicon gates in subsequent processes, and filling the recesses left by the dummy polysilicon gates with replacement metal gates. However, since the dummy polysilicon gates become very narrow, polysilicon residue may be left due to the incomplete removal of the dummy polysilicon gates, causing the degradation of the performance of the devices.